ECC and Registered Memory

[Taehoon]

ECC (parity) Error detection and correction - “…is a code in which each data signal conforms to specific rules of construction so that departures from this construction in the received signal can generally be automatically detected and corrected.”

Registered (buffered) memory - “They place less electrical load on the memory controller and allow single systems to remain stable with more memory modules than they would have otherwise.”

“A reasonable rule of thumb is to expect one bit error, per month, per gigabyte of memory. Actual error rates vary widely”

Code: Select all

OVERVIEW OF THE DIFFERENCES OF
NORMAL VS. ECC VS. REGISTERED VS. ECC+REGISTERED MEMORY
------------------------------------------------------------------
                NORMAL  ECC     REGISTERED      ECC+REGISTERED
COST            +       ++      +++             ++++
PERFORMANCE     ++++    ++      ++++            ++
STABILITY       +       +++     ++              ++++
TYPICAL USE     W       W/S     W/S             S
COMPATIBILITY   ++++    +++     ++              +
AVAILABILITY    ++++    +++     +               ++
------------------------------------------------------------------
W = WORKSTATION
S = SERVER

References/Quotes:
Wikipedia Error Correction memory
Wikipedia Registered memory
Dynamic Random Access Memory